== Specs, Standards

The verilog-ams specification adds on to the verilog, (IEEE-1364-2001 or IEEE-1364-2005), versions. I will be testing cross workability with Icarus Verilog of the same spec year.

I'm not sure yet which verilog-ams version we will use to match up with netlist verilog, and not sure about needing to read the IEEE verilog specs – they're not freely available. Acellera.org free publishes Verilog-AMS Language Reference Manual, Release 2.3.1 last changed June 1, 2009.

It may be that running a quick sanity test of netlists with icarus verilog will catch blunders as well as reading IEEE-1364-2005.

== Preprocessing

Verilog defines preprocessor macros, such as constants and conditional blocks. Preliminary basic support for `include, `(un)def, `if(n)def, `elsif is implemented as part of https://gitlab.com/gnucap/gnucap-main. This should be sufficient for the netlist/schematic representaion outlined in http://gnucap.org/dokuwiki/doku.php/gnucap:user:netlist_import_and_export

gnucap/user/gnucap_verilog_reconciled.txt · Last modified: 2018/06/05 01:34 by felixs
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